Expand description
Convenience functions to read/write the various control registers
For the mapping of registers/addresses,
see registers.rs
Functionsยง
- clear_
dma_ memory - Reset the DMA memory (blob data) and write 0s
- daq_
is_ busy - disable_
evt_ fragments - do not write header only packets when the drs is busyu
- disable_
master_ trigger_ mode - Disable the master trigger
- disable_
trigger - stop all triggers
- enable_
evt_ fragments - write header only packets when the drs is busy
- enable_
trigger - enable triggering
- get_
blob_ buffer_ occ - Get the blob buffer occupancy for one of the two buffers
- get_
board_ id - ! Get the board ID from the control registers.
- get_
board_ id_ string - ! Get the board ID from the control registers.
- get_
deadtime - Read te last DRS4 Deadtime
- get_
device_ dna - ! The device DNA is a unique identifier
- get_
dma_ pointer - FIXME
- get_
event_ count - Get the event counter from the DRS4
- get_
event_ count_ mt - Get the event counter as sent from the MTB
- get_
event_ rate_ mt - Get the rate as sent from the MTB
- get_
lost_ event_ count - Get the lost events event counter from the DRS4
- get_
lost_ trigger_ rate - Get the rate of the lost triggers by the DRS4
- get_
mtb_ link_ id - Read the link ID from the MTB
- get_
trigger_ rate - Get the recorded triggers by the DRS4
- get_
triggers_ enabled - Check if teh TRIGGER_ENABLE register is set
- idle_
drs4_ daq - Put the daq in idle state, that is stop data taking
- reset_
daq - reset_
dma - ! Resets the DMA state machine.
- reset_
drs - reset_
drs_ event_ ctr - Reset of the internal event counter
- reset_
ram_ buffer_ occ - Reset means, the memory can be used again, but it does not mean it clears the memory.
- set_
active_ channel_ mask - Enable active channels by not touching the ch9 bits
- set_
active_ channel_ mask_ with_ ch9 - set_
drs4_ configure - This simply sets the configure bit.
- set_
master_ trigger_ mode - Enable the master trigger mode
- set_
readout_ all_ channels_ and_ ch9 - Enable the readout of all channels + the 9th channel
- set_
self_ trig_ rate - use the random self trigger
- soft_
reset_ board - Reset the board and prepare for a new run
- soft_
reset_ done - Check if the soft reset procedure has finished
- start_
drs4_ daq - Start DRS4 data acquistion
- switch_
ram_ buffer - ! Toggle between the data buffers A and B
- trigger
- Force a trigger